Articles by Har Narayan Upadhyay (8)

A Case Study of Impulse Noise Reduction Using Morphological Image Processing with Structuring Elements

V. Elamaran, Har Narayan Upadhyay, K. Narasimhan and J. Jezebel Priestley

Asian Journal of Scientific Research 8 ( 3 ): 291 - 303 , 2015

CMOS VLSI Design of Low Power SRAM Cell Architectures with New TMR: A Layout Approach

V. Elamaran and Har Narayan Upadhyay

Asian Journal of Scientific Research 8 ( 4 ): 466 - 477 , 2015

Low Power Digital Barrel Shifter Datapath Circuits Using Microwind Layout Editor with High Reliability

V. Elamaran and Har Narayan Upadhyay

Asian Journal of Scientific Research 8 ( 4 ): 478 - 489 , 2015

Stego on Song-an Amalgam of vi and FPGA for Hardware Info Hide

Sundararaman Rajagopalan, K. Pravallika, R. Radha, Har Narayan Upadhyay, J.B.B. Rayappan and Rengarajan Amirtharajan

Information Technology Journal 13 ( 12 ): 1992 - 1998 , 2014

Gyratory Assisted Info Hide-A Nibble Differencing for Message Embedding

Sundararaman Rajagopalan, Har Narayan Upadhyay, Swetha Varadarajan, J.B.B. Rayappan and Rengarajan Amirtharajan

Information Technology Journal 13 ( 12 ): 2005 - 2010 , 2014

MSB Based Embedding with Integrity: An Adaptive RGB Stego on FPGA Platform

Sundararaman Rajagopalan, Pakalapati J.S. Prabhakar, Mucherla Sudheer Kumar, N.V.M. Nikhil, Har Narayan Upadhyay, J.B.B. Rayappan and Rengarajan Amirtharajan

Information Technology Journal 13 ( 12 ): 1945 - 1952 , 2014

Modeling Combo PR Generator for Stego Storage Self Test (SSST)

Sundararaman Rajagopalan, Yamini Ravishankar, Har Narayan Upadhyay, J.B.B. Rayappan and Rengarajan Amirtharajan

Information Technology Journal 13 ( 12 ): 1936 - 1944 , 2014

Analysis of Pull-in Behavior of Electrostatic MEMS Actuators for Optical Switching Applications

M. Maheswaran, M. Nambirajan, Uppari Chaitanya Chandra Yadav and Har Narayan Upadhyay

Journal of Applied Sciences 12 ( 16 ): 1730 - 1733 , 2012